Blog posts

2023

MIMO-OFDM for 100G+/LANE Chip-to-Chip connection: SerDes, Highspeed I/O

4 minute read

Published:

Introduction of the MIMO-OFDM based highspeed IO

With the ongoing increase in demand for higher System-on-Chip (SoC) I/O speeds, the significance of data rates for chip-to-chip (C2C) and chip-to-module (C2M) communication is becoming more crucial than ever. The adoption of PMA4 has become prevalent in SerDes design, and even the consideration of PAM8 modulation is on the horizon. However, while the relatively simple architecture of NRZ, PAM4, and PAM8 offers advantages, these modulation formats also suffer from suboptimal spectrum efficiency. This challenge is particularly pronounced when limitations in PCB or substrate RF bandwidth act as bottlenecks for achieving desired data throughput performance.

RF Architect: Today, Tomorrow, and Future

1 minute read

Published:

As the demand for mobile data continues to grow, wireless devices are becoming more complex, requiring increased bandwidth and faster data rates. To address these challenges, a multi-carrier transmitter (Tx) architecture is emerging as a promising solution for future mobile wireless devices. This architecture allows for more power efficiency PA design, more efficient use of the available spectrum, enabling higher data rates and better signal quality. In this blog, we will introduce the multi-carrier Tx architecture and discuss its potential benefits for future wireless devices.

Failed project: Digital negative delay in RF matching

1 minute read

Published:

Given that time is always measured positively, ADS or other simulator can give a negative delay block in math. What does a negative delay in a circuit mean? A negative delay circuit/block could perfectly solve the wide band matching phase rotation issue.